// Analog · Mixed-signal · Digital IC design
Divya Shree
Tala
I design circuits that hold up across process, voltage & temperature, and take digital designs from RTL to GDSII.
M.S. Electrical Engineering, Arizona State University · May 2027
Each lit die is a project · click one for its datasheet
01 / Selected work
Projects, each with a datasheet
02 / On the bench
Three signals, three designs
Pick a channel. Move over the screen to probe the trace.
03 / About
From breadboards to silicon
Small parts, big idea
How it startedAs a kid I built small circuits by following manuals, wiring up whatever the page showed. Then I learned the same kinds of parts were inside our phones and everything else at home. A few components could let people on opposite sides of the world talk. That felt like a superpower.
Analog wasn't my favorite subject at first. Working on a real CAN transceiver at SmartDV changed that: parts I thought I understood were being used in ways I hadn't imagined.
If I knew how these things work, I could build anything I had envisioned.
Analog Design Intern
SmartDV Technologies · Bangalore · Mar 2024 – Mar 2025- CAN FDLed transistor-level design of the high- and low-side output drivers for an automotive transceiver: 1.5–3 V dominant differential into 50–65 Ω over −40 to 150 °C, verified with Monte Carlo.
- +60%Led the over-temperature protection design, found the root cause, and fixed it, improving circuit efficiency by 60%.
- TimeoutCoded the TXD dominant-timeout block (1.2–4.0 ms), sized against the CAN worst case of 11 consecutive dominant bits.
- Wake-upCoded the standby wake-up pattern monitor that rejects bus faults, noise, and EMI so only valid CAN frames wake the node.
04 / Resume
Education & layer stack
Arizona State University
M.S. Electrical Engineering · 2025 – 2027 · GPA 3.7- Analog IC, Advanced Analog IC Design, Communication Transceiver Circuits
- VLSI Design, VLSI Design and Automation, SoC for Digital Design
- Design Verification and Testing, Advanced Digital Design and Verification
BMS College of Engineering
B.E. Electronics & Communication · 2020 – 2024- Analog Electronic Circuits, Linear ICs, Mixed-Signal Design, RF and Microwave
- Published a paper on a Booth multiplier taken from RTL to GDSII
Eligible for F-1 OPT + 24-month STEM OPT extension